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NXP Semiconductors /NeoM3 /I2S /TXBITRATE

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Interpret as TXBITRATE

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31282724232019161512118743000000000000000000000000000000000000000000TX_BITRATE0RESERVED

Description

I2S Transmit bit rate divider. This register determines the I2S transmit bit rate by specifying the value to divide TX_MCLK by in order to produce the transmit bit clock.

Fields

TX_BITRATE

I2S transmit bit rate. This value plus one is used to divide TX_MCLK to produce the transmit bit clock.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data